Fishing – trapping – and vermin destroying
Patent
1987-09-08
1989-04-04
Hearn, Brian E.
Fishing, trapping, and vermin destroying
148DIG37, 148DIG82, 148DIG124, 357 42, 357 43, 437 59, 437 76, 437162, 437168, 437186, 437913, 437954, H01L 2978, H01L 21225
Patent
active
048187208
ABSTRACT:
A semiconductor integrated circuit device is disclosed which comprises a bipolar transistor and a field effect transistor, in which a gate electrode of the field effect transistor and a collector electrode of the bipolar transistor are formed from a common electrode layer of a high impurity concentration, and in which the collector region of the bipolar transistor comprises a region of a high impurity concentration having a conductivity type the same as that of the collector region of the bipolar transistor.
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Sorab K. Ghandhi, "VLSI Fabrication Principles", John Wiley & Sons, New York, NY, 1983, pp. 170-171.
N. G. Anantha et al, IBM Technical Disclosure Bulletin, vol. 23, No. 1, Jun. 1980, "Method for Making Self-Aligned Mesfets with Process Compatible with NPN Transistors", pp. 167-169.
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Bunch William
Hearn Brian E.
Kabushiki Kaisha Toshiba
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