Weighted random pattern testing apparatus and method

Electricity: measuring and testing – Plural – automatically sequential tests

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324 73AT, 371 25, G01R 3128

Patent

active

048018708

ABSTRACT:
A method and apparatus for testing very large scale integrated circuit devices, most particularly Level Sensitive Scan Design (LSSD) devices, by applying differently configured sequences of pseudo-random patterns in parallel to each of the input terminals of the device under test, collecting the output responses from each of the output terminals in parallel, combining these outputs to obtain a signature which is a predetermined function of all of the sequences of parallel outputs and comparing the test signature with a known good signature obtained by computer simulation. The input test stimuli are further altered in a predetermined fashion as a function of the structure of the device to be tested, to individually weight the inputs in favor of more of less binary ones or zeros.

REFERENCES:
patent: 4503537 (1985-03-01), McAnney
patent: 4594711 (1986-06-01), Thatte
patent: 4601033 (1986-07-01), Whelan

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