Method of forming transistors with poly-sidewall contacts utiliz

Metal working – Method of mechanical manufacture – Assembling or joining

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29576W, 148174, 148175, 148DIG11, 148DIG20, 148DIG26, 148DIG50, 148DIG117, 148DIG164, 156643, 156653, 156657, 357 34, 357 35, 357 50, 357 59, 357 71, H01L 2120, H01L 2176

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046638318

ABSTRACT:
Improved bipolar transistors having minimum base-collector and collector-substrate junction area are formed by using multiple polycrystalline (e.g. doped poly silicon) layers to make lateral contact to a pillar shaped single crystal device region. The lateral poly silicon contacts are isolated from each other and the substrate and extend to the upper surface of the device for external connections. The structure is made by depositing two dielectric-poly layer sandwiches, etching and oxidizing part of the poly silicon layers to provide isolated overlapping poly silicon regions, etching a first hole through both poly silicon regions to the substrate, etching a second hole to the lower poly silicon layer, and filling the first and second holes with single and poly-crystalline silicon, respectfully. A sidewall oxide is formed at the periphery of the top of the single crystal pillar for defining the emitter location without additional masking.

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T. Nakamura et al., "Self-aligned Transistor with Sidewall Base Electrode", IEEE International Solid-State Circuit Conference, 2/20/81, pp. 214-215.
T. Nakamura et al., "Self-Aligned Transistor with Sidewall Base Electrode", IEEE Trans. on Electron Devices, vol. ED-29, No. 4, Apr. 1982, pp. 596-600.
T. Nakamura et al., "High Speed ITL Circuits Using a Sidewall Base Contact Structure," IEEE Jour. of Solid-State Circuits, vol. SC-20, No. 1, Feb. 1985, pp. 168-172.
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