Clock slip counting process and apparatus

Pulse or digital communications – Spread spectrum – Direct sequence

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3701051, 3701054, H04L 700

Patent

active

053634179

ABSTRACT:
The invention relates to a clock slip or drift counting process and apparatus, particularly for 2 Mbit MIC links consisting of using two detection modules (30,40) for frame locking words functioning as relays for incrementing a clock slip counter (80) on the basis of fixed frame locking loss and resumption criteria.

REFERENCES:
patent: 4316285 (1982-02-01), Bobilin et al.
Proceedings IEEE Global Telecommunications Conference, vol. 2, pp. 895-902, Nov. 15, 1987, A. Miles, "Digital Performance Monitoring System".
Radio and Electronic Engineer, vol. 54, No. 2, pp. 97-106, Feb. 1, 1984, P. Huckett, "Performance Evaluation in an ISDN-Digital Transmission Impairments".

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