Semiconductor memory device controlling the supply voltage on BI

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36518909, 365228, 327540, G11C 700

Patent

active

053633369

ABSTRACT:
A semiconductor memory device comprises a plurality of memory cells arrayed in matrix and each connected to a word line and a pair of bit lines for supplying a power supply voltage. A bit line load is connected to the pair of bit lines to control a current flowing through a memory cell by the power supply voltage. The semiconductor memory device also comprises a control circuit, connected to the bit line load, for detecting a variation in the power supply voltage, outputting a control signal corresponding to a value of the power supply voltage the variation of which is detected, and controlling activation/inactivation of the bit line load by changing a resistance thereof.

REFERENCES:
patent: 5046052 (1991-09-01), Miyaji et al.
patent: 5075891 (1991-12-01), Yan et al.
patent: 5229963 (1993-07-01), Ohtsuka et al.

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