Semiconductor memory device with a circuit for analyzing defects

Static information storage and retrieval – Floating gate – Particular biasing

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Details

36518903, 365200, 365201, 36523006, G11C 1140

Patent

active

049051946

ABSTRACT:
A semiconductor memory device of the invention includes a memory cell array including a plurality of memory cells, and a row decoder and a column decoder for selecting word-lines and bit-lines, respectively. The semiconductor memory device further includes a plurality of transistors having their gates connected to corresponding word-lines, their sources connected to a fixed potential source, and their drains connected commonly to a predetermined pad.

REFERENCES:
patent: 4713814 (1987-12-01), Andrusch et al.
patent: 4718042 (1988-01-01), Moll et al.
patent: 4720818 (1988-01-01), Takeguchi
patent: 4779272 (1988-10-01), Kohda et al.
patent: 4802137 (1989-01-01), Okuda et al.

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