Low temperature formation of silicided shallow junctions by ion

Details Low temperature formation of silicided shallow junctions by ion Low temperature formation of silicided shallow junctions by ion

Filed on

1995-04-03

Date issued

1996-07-16

Examiner

Quach, T. N.

Patent Class

Fishing, trapping, and vermin destroying

Other Related Categories

437200, 437201, 437247, H01L 21283, H01L 21225

Type

Patent

Status

active

Patent number

055366767

Description

ABSTRACT:
A method for forming silicided shallow junctions, wherein impurities are implanted into a silicon layer formed over a silicon substrate. A metal layer selected from one of platinum (Pt), palladium (Pd), nickel (Ni) and cobalt (Co) is deposited over the silicon layer. At least one low temperature annealing process is carried out to form a silicide layer as well as the shallow junctions. Pre-anneal of the silicon layer and post-anneal of the silicide between 450.degree. and 600.degree. C. are also employed.

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Wolf et al., Silicon Processing, vol. 1, 1986, Lattice Press, pp. 175-180, 303-305, 318-327,514-518.
Murarka, S., "Refractory Silicides for integrated circuits", J. Vac. Sci. Technol. 17(4), Jul./Aug. 1980, pp. 775-792.
Wolf, Silicon Processing, vol. 2, 1990, Lattice Press, pp. 144-147.
Hove et al., "Comparison Between CoSi.sub.2 and TiSi.sub.2 as Dopant For Shallow Silicided Junction Formation", Applied Surface Science, vol. 38, 1989, pp. 430-440.

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