Semiconductor memory

Details Semiconductor memory Semiconductor memory

1994-12-28

1995-10-31

Nelms, David C.

Static information storage and retrieval

Interconnection arrangements

365 51, 365149, 36523003, G11C 1124

Patent

active

054635772

ABSTRACT:
There is provided a semiconductor memory having a reduced power consumption in data access and a high access speed in a NAND cell array scheme in which a memory cell unit is constituted by cascade-connecting a plurality of memory cells with each other. A memory cell array is divided into a plurality of sub-arrays, and the divided sub-arrays are selectively activated, thereby decreasing the capacitances of the word lines, register word lines, bit lines, and the like which are charged/discharged in data access.

REFERENCES:
patent: 5309393 (1994-05-01), Sakata et al.
patent: 5317540 (1994-05-01), Furuyama
patent: 5341326 (1994-08-01), Takase et al.
patent: 5369612 (1994-11-01), Furuyama
ISSCC 93/Session 3/Non-Volatile, Dynamic, and Experimental Memories/Paper WP 3.5 1993 Feb. 24; T. Sugibayashi, et al.; pp. 50-51; "A 30ns 256Mb DRAM with Multi-Divided Array St Structure".
ISSCC 93/Session 3/Non-Volatile, Dynamic, and Experimental Memories/paper WP 3.3 1993 Feb. 24; T. Hasegawa, et al.; "An Experimental DRAM with a NAND-Structured Cell" pp. 46-47.

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