Apparatus for providing shared virtual memory among interconnect

Details Apparatus for providing shared virtual memory among interconnect Apparatus for providing shared virtual memory among interconnect

1995-06-05

1997-01-07

An, Meng-Ai T.

Boots, shoes, and leggings

39520001, 395412, 395413, 364228, 3642281, 364229, 36424294, 3642431, 364260, 3642601, 364DIG1, G06F 1300

Patent

active

055926258

ABSTRACT:
The invention relates to general purpose interprocessor communication implemented through a distributed shared memory network connecting a plurality of processors, computers, multiprocessors, and electronic and optical devices. The invention teaches an apparatus for shared memory based data transfer between a multiplicity of asynchronously operating devices (processors, computers, multiprocessors, etc.) each using possibly distinct memory address translation architectures. The invention further teaches shared virtual memory network communication and administration based on a unique network memory address translation architecture. This architecture is compatible with and augments the address translation and cache block replacement mechanisms of existing devices. More particularly, the invention teaches an adapter card having input/output buffers, page tables and control/status registers for insertion into an operating device, or node, whereby all address translation, memory mapping and packet generation can be implemented. The invention teaches that all network activities can be completed with only write and control operations. An interconnecting switch part and bus arrangement facilitates communication among the network adapters.

REFERENCES:
patent: 4240143 (1980-12-01), Basemer et al.
patent: 4371929 (1983-02-01), Brann et al.
patent: 4430705 (1984-02-01), Cannavino et al.
patent: 4481578 (1984-11-01), Hughes et al.
patent: 4562539 (1985-12-01), Vinee
patent: 4720784 (1988-01-01), Redhakrishnan et al.
patent: 4742447 (1988-03-01), Duvall et al.
patent: 4777595 (1988-10-01), Strecker et al.
patent: 4843542 (1989-06-01), Dashiell et al.
patent: 4926322 (1990-05-01), Stimac et al.
patent: 4994963 (1991-02-01), Rorden et al.
patent: 5020020 (1991-05-01), Pomfret et al.
patent: 5047917 (1991-09-01), Athas et al.
patent: 5163131 (1992-11-01), Row et al.
patent: 5202887 (1993-04-01), Ueno et al.
patent: 5206946 (1993-04-01), Brunk
patent: 5214775 (1993-05-01), Yabushita et al.
patent: 5220657 (1993-06-01), Bly et al.
patent: 5222217 (1993-06-01), Blount et al.
patent: 5222224 (1993-06-01), Flynn et al.
patent: 5239643 (1993-08-01), Blount et al.
patent: 5276806 (1994-01-01), Sanberg et al.
patent: 5301287 (1994-04-01), Herrell et al.
patent: 5327570 (1994-07-01), Foster et al.
patent: 5386524 (1995-01-01), Lary et al.
Notes: References were cited in the parent case US patent. #5,522,045.

Affiliated with

Also associated with

Rating

Apparatus for providing shared virtual memory among interconnect does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Apparatus for providing shared virtual memory among interconnect, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Apparatus for providing shared virtual memory among interconnect will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1772852