CMOS integrated circuit regulator for reducing power supply nois

Details CMOS integrated circuit regulator for reducing power supply nois CMOS integrated circuit regulator for reducing power supply nois

1997-06-30

1999-05-18

Tran, Toan

Miscellaneous active electrical nonlinear devices, circuits, and

Gating

Signal transmission integrity or spurious noise override

327389, 327379, H03K17/16

Patent

active

059053992

ABSTRACT:
A CMOS integrated circuit regulator for mixed mode integrated circuits reduces digital switching noise through use of a clamped dual source follower circuit and a charge reservoir bypass capacitor. Relatively constant current is provided to the CMOS logic during transitions to minimize switching noise.

REFERENCES:
patent: 4947063 (1990-08-01), O'Shaughnessy et al.
patent: 5216291 (1993-06-01), Seevinck et al.
patent: 5781045 (1998-06-01), Walia et al.
Timothy J. Schmerbeck, "Mechanisms and Effects of Noise Coupling in Mixed-Signal ICs," 1996.

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