Semiconductor memory devices

Static information storage and retrieval – Format or disposition of elements

Patent

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365244, G11C 1300

Patent

active

044398417

ABSTRACT:
In a semicondcutor memory device there is provided a specific layout of each element effectively excluding a number of "bridge" crossings for specific lines connecting the elements particularly buffer circuits and a decoder circuit, and thereby reducing the amount of resistance in the lines connecting specific elements, and increasing the signal transmission speed in the specific lines. A control circuit is arranged either beneath or above a portion of the ground line or the electric power line and the control circuit is connected to either of these lines by further vertical lines, thereby eliminating certain bridges.

REFERENCES:
patent: 4122540 (1978-10-01), Russell et al.

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