Coded data generation or conversion – Analog to or from digital conversion – With particular solid state devices
Patent
1991-11-29
1993-06-29
Hoff, Marc
Coded data generation or conversion
Analog to or from digital conversion
With particular solid state devices
341155, 307448, H03M 112
Patent
active
052238342
ABSTRACT:
A timing control for precharged digital circuits to avoid spurious error appearing at the output due to the slow pull-down of the precharged node after precharging. A NAND gate is used to delay the precharged node siganl transmitting to the output stage until the precharged node is fully discharged. This timing control circuit is used to prevent any spurious peaking of the output of an analog-to-digital converter using precharged bit lines.
REFERENCES:
patent: 4250494 (1981-02-01), Butler et al.
patent: 4633107 (1986-12-01), Norsworthy
patent: 4857764 (1989-08-01), Young
patent: 4883989 (1989-11-01), Mizukami
Hwung Yung-Peng
Wang Yunn-Hwa
Wu Tien-Yu
Hoff Marc
Industrial Technology Research Institute
Lin H. C.
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