Semiconductor integrated circuit with circuits for generating st

Details Semiconductor integrated circuit with circuits for generating st Semiconductor integrated circuit with circuits for generating st

1991-04-03

1993-06-29

Hudspeth, David R.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307303, 3074651, H03K 301, H03K 326

Patent

active

052237443

ABSTRACT:
A semiconductor integrated circuit includes a plurality of emitter-coupled logic (ECL) circuits (10) and circuitry (5, 6a, 6b) generating a reference potential to determine the logic threshold value of the ECL circuits. The reference potential generating circuitry is provided near a first pad (2) for a first supply voltage (VCC) and includes a circuit (5) for generating a first reference potential from the first supply voltage, and a circuit (6a, 6b) provided one for each the group of ECL circuits and provided near an associated ECL circuit group for generating a second reference potential from the first reference potential to generate a reference potential as the logic threshold potential of a corresponding ECL circuit. The semiconductor integrated circuit further includes a first clamping potential generating circuit (16) provided near the first pad for generating a first clamping potential in response to the first supply voltage, and a first clamping circuit (113) for clamping the potential at a node of current/voltage converting resistance element (205, 206) included in the ECL circuits at a first voltage in response to the first clamping potential.

REFERENCES:
patent: 4626771 (1986-12-01), Williams
patent: 4678935 (1987-07-01), Nawata et al.
patent: 4851721 (1989-07-01), Okitaka
patent: 4904887 (1990-02-01), Sugiyama et al.
patent: 4990797 (1991-02-01), Real et al.
patent: 5001362 (1991-03-01), Tran
patent: 5029280 (1991-07-01), Yee et al.
Hiep Van Tran, "BiCMOS Current Source Reference Network for ULSI BiCMOS with ECL Circuitry", ISSCC Digest of Technical Papers (Feb. 16, 1989), pp. 120-121.

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