Electronic time vernier circuit

Details Electronic time vernier circuit Electronic time vernier circuit

1990-06-21

1992-06-16

Oberley, Alvin E.

Communications: electrical

Land vehicle alarms or indicators

Internal alarm or indicator responsive to a condition of the...

340784, 358236, G09G 300

Patent

active

051227924

ABSTRACT:
A drive circuit for a liquid crystal display converts a display information signal to an n bit gray scale code to control the brightness at a prescribed pixel. A counter receives the m most significant bits of the n bit gray scale code and a latch receives the n-m least significant bits of the n bit gray scale code. The counter is decremented by clock pulses occurring at predetermined intervals and a set of 2.sup.n-m sub-interval timing signals are generated in response to each clock pulse. A transfer gate is enabled by an interval initiating pulse to permit charging of the pixel. One of the sub-interval timing signals is selected in response to the n-m least significant bits of the n bit gray scale code stored in the latch. The transfer gate is disabled by the sub-interval timing signal immediately succeeding the decrementing of the counter to its zero state.

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patent: 4799057 (1989-01-01), Takeda
patent: 4864290 (1989-09-01), Waters
patent: 4967110 (1990-10-01), Matsuura
Emoto et al., 0.92-in. Active Matrix LCD with Fully Integrated Poly-Si TFT Driver of New Circuit Configuration, Japan Display '89, pp. 152-154.

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