Method for manufacturing shallow trench isolation

Details Method for manufacturing shallow trench isolation Method for manufacturing shallow trench isolation

1997-12-19

1999-05-18

Monin, Jr., Donald L.

Semiconductor device manufacturing: process

Formation of electrically isolated lateral semiconductive...

Grooved and refilled with deposited dielectric material

438431, 438437, H01L21/76

Patent

active

059045400

ABSTRACT:
A method for forming shallow trench isolation comprising the steps of providing a substrate having a mask layer formed thereon. Next, the mask layer is patterned to form a first trench in the substrate. Then, dielectric spacers are formed on the sidewalls of the first trench. After that, a second trench is formed in the substrate by an etching operation following the profile of the dielectric spacers. Next, a second dielectric layer is formed filling the second trench, wherein the second dielectric layer and the dielectric spacers are formed from different materials. Thereafter, the dielectric spacers are removed to form recess cavities, and then a filler material is deposited into the recess cavities. Subsequently, a gate oxide layer is formed over the filler material and the substrate. Finally, a polysilicon gate layer is formed over the gate oxide layer.

REFERENCES:
patent: 4495025 (1985-01-01), Haskell
patent: 5298450 (1994-03-01), Verret
patent: 5643823 (1997-07-01), Ho et al.
patent: 5683932 (1997-11-01), Bashir et al.
patent: 5731221 (1998-03-01), Kwon
patent: 5795811 (1998-08-01), Kim et al.

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