Integrated circuit having buried oxide isolation and low resisti

Details Integrated circuit having buried oxide isolation and low resisti Integrated circuit having buried oxide isolation and low resisti

1984-07-03

1986-12-23

Edlow, Martin H.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

357 43, 357 44, 357 34, 307303, H01L 2712, H01L 2702

Patent

active

046315705

ABSTRACT:
An integrated circuit power supply interconnection technique is disclosed having a highly doped, low resistivity substrate for distribution of the integrated circuit's most positive supply voltage. The substrate functions as the most positive voltage point and accomodates devices that are normally connected directly to this most positive supply voltage. A dielectric buried layer overlies a portion of the substrate and isolates the substrate supply voltage from devices that are not connected directly to the most positive supply voltage.

REFERENCES:
patent: 4054899 (1977-10-01), Stehlin et al.
patent: 4255209 (1981-03-01), Morcom et al.
patent: 4564853 (1986-01-01), Van Zanten

Affiliated with

Also associated with

Rating

Integrated circuit having buried oxide isolation and low resisti does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Integrated circuit having buried oxide isolation and low resisti, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Integrated circuit having buried oxide isolation and low resisti will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-175052