Five gate flip-flop

Details Five gate flip-flop Five gate flip-flop

1975-02-18

1977-01-11

Zazworsky, John

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307215, H03K 3286

Patent

active

040029336

ABSTRACT:
A JK flip-flop circuit comprising four multiple input gates having each output fed back to an input to each gate of an opposite pair of said four gates; a clock pulse shaping circuit is provided when triggering clock pulses are to be of unknown shape or duration or when the clock pulses to be supplied are of a duration longer than twice the propagation delay time of the slowest gate of the circuit.

REFERENCES:
patent: 3467839 (1969-09-01), Miller
patent: 3535544 (1970-10-01), DeTroye
patent: 3560766 (1971-02-01), Moore
G. A. Maley, A. C. Binary Trigger, IBM Technical Disclosure Bulletin, vol. 2 No. 2, Aug. 1959, p. 63.

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