Static information storage and retrieval – Addressing – Plural blocks or banks
Patent
1986-10-24
1989-05-23
Hecker, Stuart N.
Static information storage and retrieval
Addressing
Plural blocks or banks
36518905, 340799, 340801, G11C 800, G09G 102
Patent
active
048336572
ABSTRACT:
A semiconductor memory for writing or reading data words in response to prescribed bank address data and bit address data, each word having a prescribed amount of bits, is described. The memory includes a memory array for storing the data words. The memory array includes at least two memory banks adjacent to one another, each bank having a bit area corresponding to the prescribed amount of bits, buffer memory for temporarily storing the data word for writing into the memory array or the data word read from the memory array, a first source for applying the bank address data to the memory array to access the memory banks, a second source for applying the bit address data to the memory banks to access prescribed bit locations of the memory banks, and logic circuitry responsive to the bit address data for cyclically shifting the data word stored in the buffer memory by an amount corresponding to the value of the received bit address data.
REFERENCES:
patent: 4442503 (1984-04-01), Schutt
patent: 4667190 (1987-05-01), Fant
patent: 4667313 (1987-05-01), Pinkham et al.
patent: 4688032 (1987-08-01), Saito et al.
patent: 4742474 (1988-05-01), Knierim
Gossage Glenn A.
Hecker Stuart N.
Kabushiki Kaisha Toshiba
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