Patent
1987-01-21
1989-05-23
James, Andrew J.
357 45, 357 71, H01L 2348, H01L 2710
Patent
active
048335207
ABSTRACT:
A semiconductor integrated circuit of standard-cell type or gate-array type includes a plurality of first cells arranged in a plurality of parallel lines, the first cells having first wirings for supplying power, the first wirings being extended over a plurality of the first cells arranged in the same line in a direction of the same line of the first cells, a second cell disposed in the neighbourhood of some of the first cells and having a dimension larger than the first cells, said second cell having second wirings on a periphery thereof to surround circuit portion of the second cell and means for connecting the second wirings with the first wirings in the first cells in the neighbourhood of the second cell.
REFERENCES:
patent: 3999214 (1976-12-01), Cass
patent: 4006492 (1927-02-01), Eichelberger et al.
patent: 4136356 (1979-01-01), Kusano
patent: 4568961 (1986-02-01), Noto
IEEE Journal of Solid-State Circuits, vol. SC-14, No. 2, Apr. 1979, p. 255, Peter W. Cook.
Ito Soichi
Mabuchi Yoshihiro
James Andrew J.
Key Gregory A.
NEC Corporation
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