Programmable integrated circuit and method of testing the circui

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Details

324158R, 324 73R, 364580, G01R 3126, G01R 1512

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active

044046359

ABSTRACT:
This teaches a method of testing normally untestable, programmable integrated circuits before they are irreversibly programmed by providing the circuit with first and second impedances which combine to form an initial resultant impedance. The second of these impedances has a significantly higher level of impedance then does the first. The first of these impedances is required for testing purposes only and must be subsequently effectively removed from the circuit once testing of the circuit is completed. Once the circuit has been tested the second or higher impedance is made to interact with the circuit and functionally eliminate the first impedance from the circuit. The resultant impedance of the circuit after the first impedance has been functionally removed from the circuit can be either higher or lower than the pre-programmed initial resultant impedance of the circuit.

REFERENCES:
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patent: 3789205 (1974-01-01), James
patent: 3801910 (1974-04-01), Quinn
patent: 3815025 (1974-06-01), Jordan
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patent: 4053833 (1977-10-01), Malmberg et al.
patent: 4140967 (1920-02-01), Balasubramanian et al.
patent: 4233671 (1980-11-01), Gerzberg et al.
IBM TDB, vol. 17, #1, Jun. 1974, pp. 245-247, "Memory System Fabrication Using Laser Formed Connections".
IBM TDB, vol. 18, #4, Sep. 1975, pp. 1047-1048, "Programmed Power Proportioning for PLA's" .

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