Method and apparatus for predicting an overflow in an integer mu

Details Method and apparatus for predicting an overflow in an integer mu Method and apparatus for predicting an overflow in an integer mu

1988-11-30

1990-07-10

Harkcom, Gary V.

Boots, shoes, and leggings

G06F 738

Patent

active

049411195

ABSTRACT:
An overflow prediction scheme is provided to operate in parallel with an integer multiply within a computer to predict overflow conditions of the resultant register. The operands to be multiplied are examined to determine the position of the most significant bit. The position values are summed to determine a minimum resultant size. If the minimum resultant size exceeds the size of the data field of the resultant register, an overflow flag is set. If the minimum resultant size is less than the size of the resultant register data field, the overflow flag is not set. When the minimum resultant size equals the size of the resultant register data field, the setting of the overflow flag will depend on the signs of the expected and actual resultant.

REFERENCES:
patent: 4366548 (1982-12-01), Kregness et al.
patent: 4429370 (1984-01-01), Blau et al.
patent: 4437165 (1984-03-01), Onodera
patent: 4442498 (1984-04-01), Rosen
patent: 4534010 (1985-08-01), Kobayashi et al.
patent: 4590584 (1986-05-01), Yaguchi et al.
patent: 4796217 (1989-01-01), Takahashi et al.

Affiliated with

Also associated with

Rating

Method and apparatus for predicting an overflow in an integer mu does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method and apparatus for predicting an overflow in an integer mu, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and apparatus for predicting an overflow in an integer mu will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1724901