Network adapter with host indication optimization

Details Network adapter with host indication optimization Network adapter with host indication optimization

1992-07-28

1994-04-26

Richardson, Robert L.

395275, G06F 1300

Patent

active

053074599

ABSTRACT:
Optimized indication signals of a completed data frame transfer are generated by a network adapter which reduces host processor interrupt latency. The network adapter comprises network interface logic for transferring the data frame between the network and a buffer memory and host interface logic for transferring the data frame between the buffer memory and the host system. The network adapter further includes threshold logic where a threshold value in an alterable storage location is compared to a data transfer counter in order to generate an early indication signal. The early indication signal may be used to generate an early interrupt signal to a host processor before a transfer of a data frame is completed. The network adapter also posts status information status registers which may be used by the host processor to tune the timing of the generation of the network adapter interrupt signal.

REFERENCES:
patent: 4852088 (1989-07-01), Gulick et al.
patent: 4907225 (1990-03-01), Gulick et al.
patent: 5101477 (1992-03-01), Casper et al.

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