Process for forming an FET read only memory device

Details Process for forming an FET read only memory device Process for forming an FET read only memory device

1993-03-22

1994-04-26

Thomas, Tom

Fishing, trapping, and vermin destroying

437 29, 437 45, 437 48, H01L 2170

Patent

active

053066570

ABSTRACT:
A method of producing a ROM device wherein parallel spaced bit line regions are formed in a semiconductor substrate, blanket layers of (1) polysilicon, (2) etch stop material, and (3) polysilicon, are deposited, the layers etched to form orthogonal parallel word lines on the surface of the substrate, a thick insulating layer deposited over the word lines, a resist layer deposited, exposed and developed to define a desired code implant pattern, the exposed areas of the thick layer removed, and the underlie upper polysilicon layer of the bit line removed, and ion implanted into the substrate to form a code implant.

REFERENCES:
patent: 4208780 (1980-06-01), Richman
patent: 4818716 (1989-04-01), Okuyama et al.
patent: 4874715 (1989-10-01), Paterson
patent: 5091328 (1992-02-01), Miller
patent: 5200355 (1993-04-01), Choi et al.

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