Method of charging and discharging floating gage transistors to

Static information storage and retrieval – Floating gate – Particular biasing

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36518519, G11C 1134

Patent

active

058417010

ABSTRACT:
A method for improving the endurance and reliability of a floating gate transistor often used in memory applications by controlling the electric field induced across the tunnel oxide region of the floating gate when discharging electrons from the floating gate. The method comprises the steps of: allowing the active region to ground; and applying a program voltage to the floating gate over a period of time and at a magnitude, by increasing the voltage from zero volts to the magnitude over a first period of at least 1 millisecond (ms.), maintaining the voltage at the magnitude for a second period of around 10 ms.-100 ms. sufficient to place charge on the floating gate, and decreasing the voltage from the magnitude during a third period to zero volts in not greater than 50 microseconds.

REFERENCES:
patent: 4434478 (1984-02-01), Cook et al.
patent: 5491657 (1996-02-01), Haddad et al.
patent: 5517470 (1996-05-01), Zanders et al.
patent: 5561620 (1996-10-01), Chen et al.

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