Semiconductor device with upper and lower gate electrode structu

Active solid-state devices (e.g. – transistors – solid-state diode – Heterojunction device – Field effect transistor

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257 24, 257200, 257656, H01L 31072, H01L 31109, H01L 2906, H01L 31075

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active

052705560

ABSTRACT:
A semiconductor device includes a layer on a substrate in which a two-dimensional electron gas is produced, source and drain electrodes disposed opposite each other on the substrate, and a gate electrode including a plurality of lower gate electrodes and an upper gate electrode. The lower gate electrodes are spaced at prescribed intervals in a direction perpendicular to a direction connecting the source and drain electrodes and connected to the layer only at their bottom surfaces. The upper gate electrode is disposed on the lower gate electrodes and electrically connects the lower gate electrodes to each other. When a bias voltage is applied to the gate electrode, a depletion layer spreads below the lower gate electrodes and the two-dimensional electron gas is concentrated beneath regions where the lower gate electrodes are absent, producing a quasi one-dimensional electron gas. Therefore, a semiconductor device utilizing the quasi one-dimensional electron gas as a channel current, in which parasitic capacitance is not increased, is achieved.

REFERENCES:
patent: 4463366 (1984-07-01), Ishii et al.
patent: 4583107 (1986-05-01), Clarke
patent: 4796068 (1989-01-01), Katayama et al.
patent: 5057883 (1991-10-01), Noda
Onda et al, "Stripped Channel Field Effect Transistors With a Modulation Doped Structure", IEEE International Electron Devices Meeting, Dec. 1989, pp. 5.8.2-5.8.4.
Eugster et al, "Criteria For One-Dimensional Transport In Split-Gate Field Effect Transistors", IEEE International Electron Devices Meeting, Dec. 1989, pp. 13.4.1-13.4.4.

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