Content addressable memory device

Details Content addressable memory device Content addressable memory device

1989-11-15

1991-09-24

Popek, Joseph A.

Static information storage and retrieval

Associative memories

Ferroelectric cell

365156, 365190, G11C 1504

Patent

active

050519492

ABSTRACT:
A memory device for a content addressable memory is configured of a pair of multibit memory cells which permits the memory to be programmably readable on an individual bit basis, whereby the memory may be selectively programmed to be fully content addressable, partially content addressable, or non-content addressable. The memory device is coupled to a complementary bit line pair and has a pair of word enable lines coupled to address lines and a respective row output line, the state of which is monitored during an associative read operation. Data is stored in a respective memory device in the form of complementary bit codes, individual components of which are written into the memory cells. The participation of each memory device during an associative read operation is controlled by means of a set of switching circuits that are coupled to each memory cell, the bit lines and the output line. Depending upon the multibit codes that have been stored in the memory cells and the contents of the bit lines, these controlled switching circuits controllably cause a prescribed logic potential to be applied by the memory device to the output line and thereby indicate the occurrence of a match.

REFERENCES:
patent: 4833643 (1989-05-01), Hori

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