Computer address analyzer having a counter and memory locations

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Details

364920, 3649449, 36494492, G06F 1134

Patent

active

050519441

ABSTRACT:
A computer monitoring device for recording the number of times address locations of a computer are accessed by a test program in order to determine if each available address is addressed by the test program and the frequency of the accesses. Omissions or low numbers of accesses reveal weak portions of the test program. The device is comprised of a probe for coupling to the address bus of the computer under test, a monitor computer and an address analyzer coupled to the probe and the monitor computer. The analyzer is comprised of a memory having at least one addressable location for every valid address that appears on the address bus. For each address received a fetch of a count stored at the location represented by that memory address is performed and the count is incremented by one and stored back into the memory at the accessed location.

REFERENCES:
patent: 3588837 (1971-06-01), Rash
patent: 4195258 (1980-03-01), Yen
patent: 4213178 (1980-07-01), Diez et al.
patent: 4475195 (1984-10-01), Carey
patent: 4752928 (1988-06-01), Chapman et al.

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