Method for selectively transferring data instructions to a cache

Details Method for selectively transferring data instructions to a cache Method for selectively transferring data instructions to a cache

1990-11-27

1993-07-06

Bowler, Alyssa H.

Boots, shoes, and leggings

36496424, 364DIG1, 3642613, 395375, G06F 938, G06F 932, G06F 1300

Patent

active

052261387

ABSTRACT:
A cache controller is coupled between a central processing unit (CPU) and a memory management unit (MMU). The MMU is coupled to main memory, and the cache controller is further coupled to a cache memory. A cache controller transfers a block of N programming instructions from the main memory into the cache memory. Once this transfer is complete, the CPU begins the sequential execution of the N instructions. Generally concurrently, the cache controller scans each of the N instructions to detect branch instructions. Branch instructions are those instructions which require additional data not found within the block of N instructions previously loaded into the cache. Upon detection a branch instruction, and prior to the execution of the branch instruction by the CPU, the cache controller fetches the branch instruction data from main memory, and stores it within the cache.

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