Boots – shoes – and leggings
Patent
1990-02-21
1993-07-06
Lee, Thomas C.
Boots, shoes, and leggings
395800, 364228, 364230, 3642629, 364263, 364DIG1, G06F 938, G06F 1576
Patent
active
052261263
ABSTRACT:
A pipeline control system is distributed over the functional units (15, 17, 20, 25) in a processor (10). Decoder logic (12) issues operations, each with an associated tag, to the functional units, with up to n operations allowed to be outstanding. The units execute the operations and report termination information back to the decoder logic, but do not irrevocably change the state of the machine. Based on the termination information, the decoder logic retires normally terminated operations in order. If an operation terminates abnormally, the decoder logic instructs the units to back out of those operations that include and are later than the operation that terminated abnormally.
REFERENCES:
patent: 4425617 (1984-01-01), Sherwood
patent: 4521851 (1985-06-01), Trubisky et al.
patent: 4578750 (1986-03-01), Amdahl et al.
patent: 4594655 (1986-01-01), Hao et al.
patent: 4594660 (1986-06-01), Guenthner et al.
patent: 4689765 (1987-08-01), Hooper
patent: 4736288 (1988-04-01), Shintani et al.
patent: 4760519 (1988-07-01), Papworth et al.
patent: 4774659 (1988-09-01), Smith et al.
patent: 4783736 (1988-11-01), Ziegler et al.
patent: 4785395 (1988-11-01), Keeley
patent: 4794521 (1988-12-01), Ziegler et al.
patent: 4807115 (1989-02-01), Torng
patent: 4831515 (1989-05-01), Kamada et al.
patent: 4894772 (1990-01-01), Langendorf
patent: 4903196 (1990-02-01), Pomerine et al.
patent: 4908750 (1990-03-01), Jablow
patent: 4916652 (1990-04-01), Schwarz et al.
patent: 4924466 (1990-05-01), Gregor et al.
patent: 4942525 (1990-06-01), Shintani et al.
patent: 4943916 (1990-07-01), Asano et al.
patent: 4970641 (1990-11-01), Hester et al.
patent: 4991090 (1991-02-01), Emma et al.
patent: 5010482 (1991-04-01), Keller et al.
patent: 5018063 (1991-05-01), Liu
patent: 5063497 (1991-11-01), Cutler et al.
patent: 5067069 (1991-11-01), Fite et al.
patent: 5075840 (1991-02-01), Grohoski et al.
David R. Stiles and Harold L. McFarland; "Pipeline Control for a Single Cycle VLSI Implementation of a Complex Instruction Set Computer"; Computer Society of the IEEE; pp. 504-508.
A. Thampy Thomas; "A Single Cycle VLS CISC-Based Workstation: System Overview and Performance Characteristics"; Computer Society of the IEEE; pp. 500-503.
Atig Raza; "Technology Constraints on VLSI Processor Implementation"; Computer Society of the Thirty-Fourth IEEE; pp. 509-512.
M. J. Flynn, P. R. Low; "The IBM System/360 Model 91: Some Remarks on System Development"; IBM Journal; Jan., 1967; pp. 2-7.
D. W. Anderson, F. J. Sparacio, R. M. Tomasulo; "The IBM System/360 Model 91: Machine Philosophy and Instruction-Handling"; IBM Journal; Jan. 1967; pp. 8-24.
R. M. Tomasulo; "An Efficient Algorithm for Exploiting Multiple Arithmatic Units"; IBM Journal; Jan. 1967; pp. 19-33.
S. M. Anderson, et al.; "The IBM System/300 Model 91: Floating Point Execution Unit"; IBM Journal; Jan. 1967; p. 34.
L. J. Boland, et al.; "The IBM System/360 Model 91: Storage System"; IBM Journal; Jan. 1967; pp. 54-58.
Cargnoni Robert A.
Favor John G.
Greenley Dale R.
McFarland Harold L.
Mehta Shrenik
Lee Thomas C.
Nexgen Microsystems
LandOfFree
Processor having plurality of functional units for orderly retir does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Processor having plurality of functional units for orderly retir, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Processor having plurality of functional units for orderly retir will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-1696304