Augumented multiprocessor networks

Details Augumented multiprocessor networks Augumented multiprocessor networks

1989-06-26

1992-07-28

Heckler, Thomas M.

Boots, shoes, and leggings

364DIG2, 3642295, 364228, 3642306, G06F 1300

Patent

active

051346907

ABSTRACT:
An augmented De Bruijn multiprocessor network. Multiple microprocessors having a constant number of I/O ports are connected according to a network technique which yields a machine of predetermined degree. A modified binary De Bruijn graph of degree four, DG(2,k), is used as the basis for the preferred implementation. An augmentation technique supplements the basic De Bruijn topology with a 2D-mesh in a first set of steps and with a 3D-mesh in a second set of steps. The resulting machine topology contains substantially all of the problem-solving techniques important in multiprocessing, while maintaining a machine of constant degree.

REFERENCES:
patent: 4598400 (1986-07-01), Hillis
patent: 4729095 (1988-03-01), Colley et al.
patent: 4730322 (1988-03-01), Pollara-Bozzola
Samatham et al., "The DeBruiju Multiprocessor Network: A Versatile Parallel Processing and Sorting Network for VLSI", IEEE Trans. on computers, vol. 38, No. 4, Apr. 1989, pp. 567-581.
J. P. Hayes, et al., "A Microprocessor Based Hypercube Supercomputer,"IEEE Micro, pp. 6-17, Oct. 1986.
Samatham. et al., "The De Bruijn Multiprocessor Network: A Versastile Sorting Network", Proceedings of the 12th Annual International Symposium on Computer Architecture, 1985, pp. 360-367.
Samatham, et al., "A Multiprocessor Network Suitable for Single-Chip VLSI Implementation,"Proceedings of the 11th Annual International Symposium on Computer Architecture, 1984, pp. 328-337.
Samatham, M. R. "De Bruijn Multiprocessor Networks", Ph.D. Thesis for University of Massachusetts, 1986.

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