Signal translator for interconnecting CMOS and BiCMOS logic gate

Details Signal translator for interconnecting CMOS and BiCMOS logic gate Signal translator for interconnecting CMOS and BiCMOS logic gate

1991-12-18

1993-07-06

Westin, Edward P.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307451, 307448, H03K 1920, H03K 190175

Patent

active

052257215

ABSTRACT:
A signal translator circuit receives digital input signals of one voltage polarity and translates them to digital output signals of an opposite polarity. One embodiment of the translator converts conventional CMOS signal levels of +5 and 0 volts to modified CMOS signal levels of 0 and -5.2 volts. Another embodiment of the translator converts the 0 and -5.2 volt signals to the +5 and 0 volt signals. Both embodiments of the translator are made of transistors whose breakdown voltage only slightly exceeds +5 volts.

REFERENCES:
patent: 4656372 (1987-04-01), Sani et al.
patent: 4719372 (1988-01-01), Chappell et al.
patent: 4849660 (1989-07-01), Hayashi et al.
patent: 4977339 (1990-12-01), Denda
patent: 5047671 (1991-09-01), Suthar et al.

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