Flash EEPROM with dual-sidewall gate

Details Flash EEPROM with dual-sidewall gate Flash EEPROM with dual-sidewall gate

1992-10-30

1999-06-08

Nelms, David

Static information storage and retrieval

Floating gate

36518518, 257321, G11C 1604

Patent

active

059109122

ABSTRACT:
An EEPROM cell includes a dual-gate transistor having a floating gate for storing the data and a select gate to access the cell, the two gates each being formed from poly sidewalls and being separated by a thin vertical oxide member that is formed by growing oxide on the vertical poly sidewalls of an aperture in which the select gate is formed, so that the final structure has dimensions that are less than those obtainable with optical lithography because both gates are sidewalls and therefore not limited to the dimensions achievable with optical lithography.

REFERENCES:
patent: 4794565 (1988-12-01), Wu et al.
patent: 4931847 (1990-06-01), Corda
patent: 5019879 (1991-05-01), Chiu
patent: 5020030 (1991-05-01), Huber
patent: 5041886 (1991-08-01), Lee
patent: 5051793 (1991-09-01), Wang
patent: 5095344 (1992-03-01), Harari
patent: 5115288 (1992-05-01), Manley
patent: 5153854 (1992-10-01), Herold
Mizutani et al., "A New EPROM Cell with a Side-Wall Floating Gate for High-Density and High-Performance Device", IEDM 1985, pp. 635-637.
Yamauchi et al., "A 5V-Only Virtual Ground Flash Cell with An Auxiliary Gate for High Density and High Speed Application", IEDM 1991, pp. 319-322.

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