Method and system for interrupt handling during emulation in a d

Details Method and system for interrupt handling during emulation in a d Method and system for interrupt handling during emulation in a d

1997-09-22

1999-11-30

Teska, Kevin J.

395733, G06F 944

Patent

active

059957433

ABSTRACT:
A processor and method of interrupt handling in a processor which has a native instruction set and emulates guest instructions within a guest instruction set are described. According to the method, in response to occurrence of an interrupt during emulation of a current guest instruction, an indication of a location in memory of the current guest instruction, an indication of a location in memory of a next guest instruction to be emulated, and an indication of a particular native instruction are stored. After an interrupt handler is executed, emulation is resumed by executing native instructions beginning with the particular native instruction. In response to execution of a native instruction of a first type before execution of a native instruction of a second type, the current guest instruction is fetched from memory. In response to execution of a native instruction of the second type before execution of a native instruction of the first type, the next guest instruction is fetched from memory without fetching the current guest instruction.

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