Method of manufacturing submicron channel transistors

Details Method of manufacturing submicron channel transistors Method of manufacturing submicron channel transistors

1980-03-31

1982-01-26

Roy, Upendra

Metal treatment

Compositions

Heat treating

29571, 148187, 357 23, 357 59, 357 91, H01L 21225, H01L 21308, H01L 2978

Patent

active

043126804

ABSTRACT:
A short channel insulated gate field effect transistor, suitable for use in high speed integrated circuits is described as being manufactured by a self-aligned process in which the gate electrode is formed by a selective etching technique. In practicing the process, an etch limiting element is laterally diffused from an adjacent solid source into a polycrystalline silicon layer. In one embodiment, a portion of the solid source serves as a mask in another step of the process to define the length of a drain extension region.

REFERENCES:
patent: 3623923 (1971-11-01), Kennedy et al.
patent: 3738880 (1973-06-01), Laker
patent: 4026740 (1977-05-01), Owen
patent: 4124933 (1978-11-01), Nicholas
patent: 4162504 (1979-07-01), Hsu
patent: 4201603 (1980-05-01), Scott, Jr. et al.
patent: 4232327 (1980-11-01), Hsu

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