CMOS full-adder stage

Details CMOS full-adder stage CMOS full-adder stage

1987-03-20

1989-03-28

Malzahn, David H.

Boots, shoes, and leggings

364786, G06F 750

Patent

active

048170305

ABSTRACT:
To a prior art CMOS full-adder stage having sixteen transistors, a static inverter is added which consists of a P-type transistor and an N-type transistor, and the series combination (sc) of P- and N-type transistors is wired symmetrically. This increases the processing frequency, because the carry-signal path is no longer loaded by the four transistors contributing to the summation.

REFERENCES:
patent: 4621338 (1986-11-01), Uhlenhoff
patent: 4651296 (1987-03-01), Koike
patent: 4701877 (1987-10-01), Sahoda et al.
patent: 4713790 (1987-12-01), Kloker et al.

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