Boots – shoes – and leggings
Patent
1985-12-18
1989-03-28
Heckler, Thomas M.
Boots, shoes, and leggings
G06F 1516, G06F 1531
Patent
active
048169935
ABSTRACT:
A plurality of operation units are connected to one another. The operation units include a processor, a buffer memory, and a data transfer control circuit connected between the processor and the buffer memory for controlling the data input-output with the buffer memories in the other of the operation units. The buffer memories and the data transfer control circuit are connected with one another by data buses, respectively.
REFERENCES:
patent: 4195351 (1980-03-01), Barner et al.
patent: 4467422 (1984-08-01), Hunt
patent: 4514807 (1985-04-01), Nagi
patent: 4608629 (1986-08-01), Nagel
patent: 4663706 (1987-05-01), Allen et al.
Cyre et al., "WISPAC: A Parallel Array Computer for Large-Scale System Simulation", Simulation, Nov. 1977, pp. 165-172.
Harada Twao
Nagaoka Yukio
Takahashi Fumio
Adams Rebecca L.
Heckler Thomas M.
Hitachi , Ltd.
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