Faulty module location in a fault tolerant computer system

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G06F 1100

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059930551

ABSTRACT:
A fault tolerant computer system includes a number of lockstep subsystems, each of which comprises a parallel input signature generator, used for data compression to allow practical comparison of the operation of internal modules of the lockstep subsystem, and a logic analyzer which stores the outputs of the internal modules of the lockstep subsystem. A signature comparator is connected to receive the signatures from the signature generators of the individual lockstep subsystems. The signature comparator generates a trigger signal for triggering the logic analyzers on detecting a difference in the signatures. The logic analyzers store enough states to include the first difference from a module following a detected difference in the signature outputs. The logic analyzer traces are searched automatically after an out-of-sync event to locate the first difference in operation and to determine which internal module provided the faulty output and then that module is labelled as broken.

REFERENCES:
patent: 4807228 (1989-02-01), Dahbura et al.
patent: 5630048 (1997-05-01), La Joie et al.
Patent Abstracts Of Japan; vol. 10, No. 086 (P-443), Apr. 4, 1986.
IEEE Journal Of Solid-State Circuits, vol. 27, No. 1, Jan. 1992, pp. 4-16.

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