Semiconductor dynamic memory

Details Semiconductor dynamic memory Semiconductor dynamic memory

1981-03-25

1983-03-15

Hecker, Stuart N.

Static information storage and retrieval

Addressing

365233, G11C 800

Patent

active

043769896

ABSTRACT:
A semiconductor dynamic memory including a plurality of functional blocks or interface circuits for controlling the memory, such as a row-enable buffer, a row-address buffer, a word decoder, a column-enable buffer, a column-address buffer, and a column decoder. The functional blocks in the semiconductor dynamic memory are sequentially reset by signals from the subsequent functional block so that the power operations of the functional blocks of the subsequent stages is indicated by the reset signal, and thus are returned to the state in which they are ready to execute the next processing.

REFERENCES:
patent: 3893086 (1975-07-01), Nanya
patent: 4110842 (1978-08-01), Sarkissian et al.
patent: 4272832 (1981-06-01), Ito
Smith, "Storage Bus Request System", IBM Tech. Disc. Bul., vol. 9, No. 6, 11/66, pp. 619-620.

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