Polycide process for integrated circuits

Details Polycide process for integrated circuits Polycide process for integrated circuits

1987-04-06

1989-03-28

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437193, 437195, 437192, 437239, H01L 21283

Patent

active

048164259

ABSTRACT:
A process for making a semiconductor integrated circuit which has electrodes, contacts and interconnects composed of a multilayer structure including a layer of polycrystalline silicon with an overlying layer of a refractory metal silicide such as MoSi.sub.2 or WSi.sub.2. Adhesion of the metal silicide to the polysilicon is enhanced by forming a thin silicon oxide coating on the polysilicon before sputtering the metal silicide. The resulting structure has low resistance but retains the advantages of polysilicon on silicon.

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S. P. Murarka, J. Vac. Sci. Technol., vol. 17, No. 4, Jul./Aug. 1980, pp. 775-791.

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