Nonvolatile semiconductor memory device in which band to band tu

Details Nonvolatile semiconductor memory device in which band to band tu Nonvolatile semiconductor memory device in which band to band tu

1996-07-12

1997-08-12

Nelms, David C.

Static information storage and retrieval

Floating gate

Particular biasing

36518518, 36518529, 36518533, G11C 1606

Patent

active

056572719

ABSTRACT:
A reliable Flash EPROM in which a band-to-band tunneling current is suppressed. A memory cell is formed on a double well structure region. A second impurity region of a first conductivity type formed in a first impurity region of a second conductivity type on a semiconductor substrate of the first conductivity type. A gate oxide film, a floating gate, an insulating film and a control gate are laminated in this order on a surface of the second impurity region, thereby forming a laminated gate. Source and drain regions are formed in a surface region of the second impurity region with the laminated gate interposed therebetween. The EPROM comprises a voltage supply system to suppress a band-to-band tunneling current. To discharge the floating gate, the semiconductor substrate is grounded and a potential difference between one of the source and drain regions and the second impurity region of the first conductivity type is controlled to be greater than 0 V and smaller than 2.5 V.

REFERENCES:
patent: 5361235 (1994-11-01), Kodama
patent: 5457652 (1995-10-01), Brahmbhatt
patent: 5561620 (1996-10-01), Chen et al.
IEEE Transactions On Electron Devices, vol. 42, No. 1, pp. 150-159, Jan. 1995.
1991 Symposium On VLSI Technology, JSAP Cat. No. AP911210, IEEE Cat. No. 91 CH 3017, pp. 77-78, May 28-30, 1991, Hitoshi Kume et al.
1992 IEEE International Solid-State Circuits Conference, IEEE Cat. No. 92CH3128-6, pp. 154-155, Feb., 1992, Toshikatsu Jinbo et al.

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