Clock signal generation apparatus

Facsimile and static presentation processing – Facsimile – Synchronization

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328 55, 328 63, H04M 136

Patent

active

049125648

ABSTRACT:
A clock signal generation apparatus is disclosed in which an original signal source generates an original clock signal, a first frequency divider starts dividing the frequency of the original clock signal in response to the rise of the original clock signal and produces a frequency-divided clock signal, a second frequency divider starts dividing the frequency of the original clock signal in response to the fall of the original clock signal and produces a frequency-divided clock signal, a sync timing signal source generates a sync timing signal, and a selection circuit renders effective selected one of the first and second frequency dividers in accordance with a level of the original clock signal at selected one of the ride and fall timings of the sync timing signal thereby to produce the frequency-divided clock signal of the effective frequency divider as a clock signal.

REFERENCES:
patent: 4796098 (1989-01-01), Shimada

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