CMOS to ECL output buffer

Details CMOS to ECL output buffer CMOS to ECL output buffer

1987-08-25

1990-03-27

Zazworsky, John

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307443, 307446, 307448, 323317, H03K 19092, H03K 1902, G05F 316

Patent

active

049123475

ABSTRACT:
A circuit is disclosed which converts CMOS logic input signals to ECL output signals. A pair of FETs, arranged as a conventional CMOS inverter, responds to the CMOS logic input signals and drives a bipolar transistor operating as a voltage follower. The emitter of the bipolar transistor serves as the output of the buffer providing the ECL output signals. A resistor having a predetermined resistance couples between a voltage source and the base of the bipolar transistor. First one of the pair of FETs couples a constant current source to the resistor and the base of the bipolar transistor when the buffer is supplying an ECL logical "zero" logic signal. The current from the current source passing through the resistor establishes the ECL logical "zero" output voltage. Second one of the pair of FETs shunts the resistor when the buffer is supplying an ECL logical "one" output, allowing faster transitioning of the output of the buffer from an ECL logical "zero" to a logical "one". Further, the current from the current source compensates for variations in the resistance of the resistor to assure a substantially constant difference between the ECL logical "one" and the ECL logical "zero" output voltages with variations in the resistance of the resistor from the manufacture thereof.

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"Extended Abstracts", vol. 87-1, Abstract No. 273, Bi-CMOS Interface Circuit in Mixed CMOS/TTL and ECL Use Environment, Toshiba Corporation, Semiconductor Division, Yasuhiro Sugimot, Hiroyuki Hara.
"Session XVIII: Static RAMs, Fam18.1: An ECL Compatible 4K CMOS RAM", Edwin L. Hudson and Stephen L. Smith, Intel Corp., Santa Clara, Calif., ISSCC 82/ Friday, Feb. 12, 1982/Continental Ballrooms 5-9/9:00 a.m.
"13-ns, 500-mW, 64-kbit ECL RAM Using Hi-BICMOS Technology," IEEE, 1986, 0018-9200/86/1000-0681 $01.00, pp. 681 and 683, Authors: K. Ogiue, M. Odaka, S. Miyaoka, I. Masuda, T. Ikeda and K. Tonomura.

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