Timing verification using synchronizers and timing constraints

Details Timing verification using synchronizers and timing constraints Timing verification using synchronizers and timing constraints

1992-10-30

1997-08-12

Trans, Vincent N.

Boots, shoes, and leggings

364578, G06F 1750

Patent

active

056572395

ABSTRACT:
A computer-based method and program for improving a design of a circuit through analysis of a computer stored model of the circuit. Individual synchronization points are identified in the circuit at each of which a signal may be blocked or allowed to pass in response to appearance of a second signal at the synchronization point. The timing of the circuit is verified based on the individual synchronization points.

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patent: 5210700 (1993-05-01), Tom
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patent: 5355321 (1994-10-01), Grodstein et al.
"Timing Verification on a 1.2M-Device Full-Custom CMOS Design" by Jengwei Pan et al. published in proceedings of DAC 91, the ACM/IEEE Design Automation Conference, Jun. 1991.
"Automatic Detection of MOS Synchronizers for Timing Verification" by Joel Grodstein et al., published in ICCAD '91, IEEE Int'l Conference on Computed Aided Design, Santa Clara, Nov. 11-14, 1991.
"Constraint Identification for Timing Verification" by Joel Grodstein et al., published in ICCAD '90, IEEE Int'l Conference on Computer Added Design, Nov. 1990.

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