Ion implanted JFET with self-aligned source and drain

Details Ion implanted JFET with self-aligned source and drain Ion implanted JFET with self-aligned source and drain

1988-02-01

1990-03-27

Chaudhuri, Olik

Fishing, trapping, and vermin destroying

437 41, 437 56, 437152, 437154, 437160, 437162, 357 22, 357 42, H01L 21225, H01L 21265, H01L 2980

Patent

active

049120530

ABSTRACT:
A method of fabricating I.sup.2 JFETs including separately and in combination out-diffusion of impurities from doped source and drain contact material to product self-aligned source and drains; using the source and drain contacts as mask to form a self-aligned top gate spaced from the source and drain; and dual ion implantation of the channel for increasing radiation hardness.

REFERENCES:
patent: 3719535 (1973-03-01), Zoroglu
patent: 3886582 (1975-05-01), Kobayashi et al.
patent: 3909318 (1975-09-01), Le Can et al.
patent: 4176368 (1979-11-01), Compton
patent: 4393575 (1983-07-01), Dunkley et al.
patent: 4393578 (1983-07-01), Cady et al.
patent: 4456918 (1984-06-01), Beasom
patent: 4568957 (1986-02-01), Zuleeg et al.
patent: 4611220 (1986-09-01), MacIver
patent: 4727046 (1988-02-01), Tuntasood et al.

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