Non-volatile semiconductor memory device and method of manufactu

Details Non-volatile semiconductor memory device and method of manufactu Non-volatile semiconductor memory device and method of manufactu

1998-11-03

2000-11-07

Nelms, David

Static information storage and retrieval

Floating gate

Particular biasing

36518523, 36518524, G11C 1604

Patent

active

061445843

ABSTRACT:
Source line select transistors are provided corresponding to word lines. The source line select transistors are turned on in response to signal voltages on the corresponding word lines to connect a main source line to corresponding sub-source lines. The sub-source lines are arranged corresponding to sets of word lines. Programming/erasing are performed by using channel hot electrons and a Fowler-Nordheim current, by applying voltages to the word lines and the bit lines such that an excessive voltage may not be transmitted from the main source line to the sub-source line. Memory cell data can be precisely read out without an influence by a leak current of an over-erased or over-programmed memory cell.

REFERENCES:
patent: 4775958 (1988-10-01), Hashimoto
patent: 5400276 (1995-03-01), Takeguchi
patent: 5521864 (1996-05-01), Kobayashi et al.
patent: 5596523 (1997-01-01), Endoh et al.
patent: 5646585 (1997-07-01), Brahmbhatt
patent: 5923585 (1999-07-01), Wong et al.
patent: 5923589 (1999-07-01), Kaida et al.

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