Setup for testing an integrated circuit in a semiconductor chip

Details Setup for testing an integrated circuit in a semiconductor chip Setup for testing an integrated circuit in a semiconductor chip

1998-04-13

2000-11-07

Nguyen, Vinh P.

Electricity: measuring and testing

Fault detecting in electric circuits and of electric components

Of individual circuit component or element

324760, G01R 1073, G01R 3126

Patent

active

061442151

ABSTRACT:
A test setup for testing an integrated circuit. A holder is provided which is capable of releasably receiving and holding the integrated circuit. Apparatus is provided which tests the integrity of the integrated circuit. A controller is provided which controls the temperature of the integrated circuit.

REFERENCES:
patent: 4696578 (1987-09-01), Mansuria et al.
patent: 5006796 (1991-04-01), Burton et al.
patent: 5260668 (1993-11-01), MAllory et al.
patent: 5325052 (1994-06-01), Yamashita
patent: 5414370 (1995-05-01), Hashinaga et al.
patent: 5473259 (1995-12-01), Takeda

Affiliated with

Also associated with

Rating

Setup for testing an integrated circuit in a semiconductor chip does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Setup for testing an integrated circuit in a semiconductor chip , we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Setup for testing an integrated circuit in a semiconductor chip will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1645067