Method of making self-aligned device

Metal working – Method of mechanical manufacture – Assembling or joining

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29579, 29591, 156657, 156662, 357 23, H01L 21306, H01L 21441

Patent

active

043193951

ABSTRACT:
A self-aligned MOS transistor having improved operating characteristics and higher packing density and a method for fabricating the device. Resistance of the gate electrode is reduced substantially by forming the electrode of a metal silicide. Resistance of the source and drain regions is likewise reduced substantially by forming a metal silicide in the doped junction region which allows those regions to be smaller and to require less area. The silicided source and drain regions are self-aligned with and closely spaced to the silicided gate electrode. This is provided by a process which utilizes and makes possible an undercut etching of a polycrystalline silicon gate electrode.

REFERENCES:
patent: 4033797 (1977-07-01), Dill et al.
patent: 4141022 (1979-02-01), Sigg et al.
patent: 4182023 (1980-01-01), Cohen

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