PLL circuit having filter with switched bias voltage for quick r

Details PLL circuit having filter with switched bias voltage for quick r PLL circuit having filter with switched bias voltage for quick r

1996-03-26

1997-08-12

Grimm, Siegfried H.

Oscillators

Automatic frequency stabilization using a phase or frequency...

Plural a.f.s. for a single oscillator

331 14, 331 16, 331 17, 331 25, H03L 710

Patent

active

056569750

ABSTRACT:
A PLL circuit is provided which has excellent quick response and noise resistance. A bias data memory circuit 7 previously stores frequency assignment data Da, for assigning the frequency of output signals S1 of VCO 1, as an address and the value, of a control voltage Vc corresponding to the assigned frequency, as bias data Db. A bias voltage production circuit 6 produces a bias voltage Vb of a voltage value provided by the bias data Db output from the bias data memory circuit 7. A switch control circuit 5 compares a phase difference voltage Vd, output from a phase comparison circuit 2, with the bias voltage Vb output from the bias voltage production circuit 6. In this case, if there is a voltage difference between the phase difference voltage Vd and the bias voltage Vb, the switch control circuit 5 turns a switch 4 on to feed the bias voltage Vb to a capacitor 32 of a loop filter, and when the phase difference voltage Vd has become close to the bias voltage Vb, the switch control circuit 5 turns the switch 4 off to stop the feed of the bias voltage Vb.

REFERENCES:
patent: 4562410 (1985-12-01), O'Rourke
patent: 4980652 (1990-12-01), Tarusawa et al.
patent: 5355098 (1994-10-01), Iwasaki
patent: 5477194 (1995-12-01), Nagakura

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