Nonvolatile semiconductor memory device having test circuit for

Static information storage and retrieval – Floating gate – Particular biasing

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36518511, 36518522, G11C 1604

Patent

active

058124608

ABSTRACT:
The nonvolatile semiconductor memory of the present invention has erase circuits 30 for supplying predetermined voltage to corresponding blocks, respectively. Each of the erase circuits 30 comprises an erase address detection circuit 33 for detecting whether an erase transistor 31 conducts a switching operation in accordance with a block address signal.

REFERENCES:
patent: 5561631 (1996-10-01), Curd
patent: 5615154 (1997-03-01), Yamada
patent: 5617359 (1997-04-01), Ninomiya

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