System for retrieving token having a selected nest level and sat

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Details

395200, 3649408, 3642418, 364DIG1, G06F 133

Patent

active

052936341

ABSTRACT:
In a token train retrieval device including a memory device (24) for memorizing a plurality of tokens as stored tokens each of which starts at a starting address and ends at an end address and each of which has a nest level selected from first through N-th nest levels and comprises a header and a data set where the header comprises a data length code and a data identifier code including a nest bit, a retrieval condition memory (25) memorizes a retrieval condition as a stored condition. Supplied with the header, a header register (26) holds the data length code, the data identifier code, and the nest bit as a held data length code, a held data identifier code, and a held nest bit. Responsive to the held data identifier code and a decided nest level, a checking circuit (27) checks whether or not the stored condition is satisfied to produce a matching signal when the stored condition is satisfied. An intra-train address generating circuit (29) generates an intra-train address variable in response to the matching signal, the held nest bit, and the held data length code. By using the intra-train address and the held data length code, an end address calculating circuit (30) calculates the end address of each token as a calculated address. By using the calculated address, the intra-train addresses, and the held nest bit, a nest level decision circuit (31) decides the decided nest level indicative of one of the first through the N-th nest levels.

REFERENCES:
patent: 4651278 (1987-05-01), Herzog et al.
patent: 4750114 (1988-06-01), Hirtle
patent: 4888553 (1989-12-01), Codrington
patent: 4916660 (1990-04-01), Takahashi
patent: 4926375 (1990-05-01), Mercer et al.
patent: 4964076 (1990-10-01), Schurk

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